Nokia 2xI
-
- Einsteiger
- Beiträge: 110
- Registriert: Donnerstag 5. Dezember 2002, 14:33
Nokia 2xI
sie lässt sich nicht flashen
debug: DDF: Calibrating delay loop... debug: DDF: 67.79 BogoMIPS
debug: BMon V1.0 mID 01
debug: feID dd gtxID 0b
debug: fpID 5a dsID 01-41.e5.ce.05.00.00-6e
debug: HWrev X5 SWrev 0.81
debug: B/Ex/Fl(MB) 16/00/08
WATCHDOG reset enabled
debug: &_text 0x10000, &_etext 0x26160, &_data 0x26160, &_edata 0x29c50
debug: &_end 0x347dc, &__stack 0x400000
debug: Memory tests (0x400000 -- 0x1000000)
debug: NumberTest: debug: passed
debug: MarchTest: debug: passed
debug: PermTest: debug: passed
dbox2:root> boot net
debug:
BOOTP/TFTP bootstrap loader (v0.3)
debug:
debug: Transmitting BOOTP request via broadcast
debug: Got BOOTP reply from Server IP 192.168.0.5, My IP 192.168.0.25
debug: Sending TFTP-request for file C/dbox2/setup_dboxboot/ppcboot_writeflash
will verify ELF image, start= 0x800000, size= 201596
verify sig: 262
boot net: boot file has no valid signature
Branching to 0x40000
ppcboot 0.6.4 (Apr 11 2002 - 16:10:44)
Initializing...
CPU: PPC823ZTnnA at 67 MHz: 2 kB I-Cache 1 kB D-Cache
*** Warning: CPU Core has Silicon Bugs -- Check the Errata ***
Board: ### No HW ID - assuming TQM8xxL
DRAM: (faked) 32 MB
debug: DDF: Calibrating delay loop... debug: DDF: 67.79 BogoMIPS
debug: WATCHDOG RESET
debug: BMon V1.0 mID 01
debug: feID dd gtxID 0b
debug: fpID 5a dsID 01-41.e5.ce.05.00.00-6e
debug: HWrev X5 SWrev 0.81
debug: B/Ex/Fl(MB) 16/00/08
WATCHDOG reset enabled
debug: &_text 0x10000, &_etext 0x26160, &_data 0x26160, &_edata 0x29c50
debug: &_end 0x347dc, &__stack 0x400000
debug: Memory tests (0x400000 -- 0x1000000)
debug: NumberTest: debug: passed
debug: MarchTest: debug: passed
debug: PermTest: debug: passed
dbox2:root> help
read the source or dial 7478
dbox2:root> boot net
debug:
BOOTP/TFTP bootstrap loader (v0.3)
debug:
debug: Transmitting BOOTP request via broadcast
debug: Got BOOTP reply from Server IP 192.168.0.5, My IP 192.168.0.25
debug: Sending TFTP-request for file C/dbox2/setup_dboxboot/ppcboot_writeflash
will verify ELF image, start= 0x800000, size= 201596
verify sig: 262
boot net: boot file has no valid signature
Branching to 0x40000
ppcboot 0.6.4 (Apr 11 2002 - 16:10:44)
Initializing...
CPU: PPC823ZTnnA at 67 MHz: 2 kB I-Cache 1 kB D-Cache
*** Warning: CPU Core has Silicon Bugs -- Check the Errata ***
Board: ### No HW ID - assuming TQM8xxL
DRAM: (faked) 32 MB
debug: DDF: Calibrating delay loop... debug: DDF: 67.79 BogoMIPS
debug: WATCHDOG RESET
debug: BMon V1.0 mID 01
debug: feID dd gtxID 0b
debug: fpID 5a dsID 01-41.e5.ce.05.00.00-6e
debug: HWrev X5 SWrev 0.81
debug: B/Ex/Fl(MB) 16/00/08
WATCHDOG reset enabled
debug: &_text 0x10000, &_etext 0x26160, &_data 0x26160, &_edata 0x29c50
debug: &_end 0x347dc, &__stack 0x400000
debug: Memory tests (0x400000 -- 0x1000000)
debug: NumberTest: debug: passed
debug: MarchTest: debug: passed
debug: PermTest: debug: passed
dbox2:root> reset
dbox2:root>debug: DDF: Calibrating delay loop... debug: DDF: 67.79 BogoMIPS
debug: WATCHDOG RESET
debug: BMon V1.0 mID 01
debug: feID dd gtxID 0b
debug: fpID 5a dsID 01-41.e5.ce.05.00.00-6e
debug: HWrev X5 SWrev 0.81
debug: B/Ex/Fl(MB) 16/00/08
WATCHDOG reset enabled
debug: &_text 0x10000, &_etext 0x26160, &_data 0x26160, &_edata 0x29c50
debug: &_end 0x347dc, &__stack 0x400000
debug: Memory tests (0x400000 -- 0x1000000)
debug: NumberTest: debug: passed
debug: MarchTest: debug: passed
debug: PermTest: debug: passed
dbox2:root> erase
usage: erase start_sector [end_sector]
erase -1 erase all
erase -2 reset flash
dbox2:root> erase flash
eraseSector 0, sa 0x0, sa >> 2 0x0
erase: d7 not toggling: polling flag 0x0
reset flash
dbox2:root> reset
dbox2:root> debug: DDF: Calibrating delay loop... debug: DDF: 67.79 BogoMIPS
debug: WATCHDOG RESET
debug: BMon V1.0 mID 01
debug: feID dd gtxID 0b
debug: fpID 5a dsID 01-41.e5.ce.05.00.00-6e
debug: HWrev X5 SWrev 0.81
debug: B/Ex/Fl(MB) 16/00/08
WATCHDOG reset enabled
debug: &_text 0x10000, &_etext 0x26160, &_data 0x26160, &_edata 0x29c50
debug: &_end 0x347dc, &__stack 0x400000
debug: Memory tests (0x400000 -- 0x1000000)
debug: NumberTest: debug: passed
debug: MarchTest: debug: passed
debug: PermTest: debug: passed
dbox2:root> boot net
debug:
BOOTP/TFTP bootstrap loader (v0.3)
debug:
debug: Transmitting BOOTP request via broadcast
debug: Got BOOTP reply from Server IP 192.168.0.5, My IP 192.168.0.25
debug: Sending TFTP-request for file C/dbox2/setup_dboxboot/ppcboot_writeflash
will verify ELF image, start= 0x800000, size= 201596
verify sig: 262
boot net: boot file has no valid signature
Branching to 0x40000
ppcboot 0.6.4 (Apr 11 2002 - 16:10:44)
Initializing...
CPU: PPC823ZTnnA at 67 MHz: 2 kB I-Cache 1 kB D-Cache
*** Warning: CPU Core has Silicon Bugs -- Check the Errata ***
Board: ### No HW ID - assuming TQM8xxL
DRAM: (faked) 32 MB
debug: DDF: Calibrating delay loop... debug: DDF: 67.79 BogoMIPS
debug: WATCHDOG RESET
debug: BMon V1.0 mID 01
debug: feID dd gtxID 0b
debug: fpID 5a dsID 01-41.e5.ce.05.00.00-6e
debug: HWrev X5 SWrev 0.81
debug: B/Ex/Fl(MB) 16/00/08
WATCHDOG reset enabled
debug: &_text 0x10000, &_etext 0x26160, &_data 0x26160, &_edata 0x29c50
debug: &_end 0x347dc, &__stack 0x400000
debug: Memory tests (0x400000 -- 0x1000000)
debug: NumberTest: debug: passed
debug: MarchTest: debug: passed
debug: PermTest: debug: passed
dbox2:root>
wer kann mir helfen
debug: DDF: Calibrating delay loop... debug: DDF: 67.79 BogoMIPS
debug: BMon V1.0 mID 01
debug: feID dd gtxID 0b
debug: fpID 5a dsID 01-41.e5.ce.05.00.00-6e
debug: HWrev X5 SWrev 0.81
debug: B/Ex/Fl(MB) 16/00/08
WATCHDOG reset enabled
debug: &_text 0x10000, &_etext 0x26160, &_data 0x26160, &_edata 0x29c50
debug: &_end 0x347dc, &__stack 0x400000
debug: Memory tests (0x400000 -- 0x1000000)
debug: NumberTest: debug: passed
debug: MarchTest: debug: passed
debug: PermTest: debug: passed
dbox2:root> boot net
debug:
BOOTP/TFTP bootstrap loader (v0.3)
debug:
debug: Transmitting BOOTP request via broadcast
debug: Got BOOTP reply from Server IP 192.168.0.5, My IP 192.168.0.25
debug: Sending TFTP-request for file C/dbox2/setup_dboxboot/ppcboot_writeflash
will verify ELF image, start= 0x800000, size= 201596
verify sig: 262
boot net: boot file has no valid signature
Branching to 0x40000
ppcboot 0.6.4 (Apr 11 2002 - 16:10:44)
Initializing...
CPU: PPC823ZTnnA at 67 MHz: 2 kB I-Cache 1 kB D-Cache
*** Warning: CPU Core has Silicon Bugs -- Check the Errata ***
Board: ### No HW ID - assuming TQM8xxL
DRAM: (faked) 32 MB
debug: DDF: Calibrating delay loop... debug: DDF: 67.79 BogoMIPS
debug: WATCHDOG RESET
debug: BMon V1.0 mID 01
debug: feID dd gtxID 0b
debug: fpID 5a dsID 01-41.e5.ce.05.00.00-6e
debug: HWrev X5 SWrev 0.81
debug: B/Ex/Fl(MB) 16/00/08
WATCHDOG reset enabled
debug: &_text 0x10000, &_etext 0x26160, &_data 0x26160, &_edata 0x29c50
debug: &_end 0x347dc, &__stack 0x400000
debug: Memory tests (0x400000 -- 0x1000000)
debug: NumberTest: debug: passed
debug: MarchTest: debug: passed
debug: PermTest: debug: passed
dbox2:root> help
read the source or dial 7478
dbox2:root> boot net
debug:
BOOTP/TFTP bootstrap loader (v0.3)
debug:
debug: Transmitting BOOTP request via broadcast
debug: Got BOOTP reply from Server IP 192.168.0.5, My IP 192.168.0.25
debug: Sending TFTP-request for file C/dbox2/setup_dboxboot/ppcboot_writeflash
will verify ELF image, start= 0x800000, size= 201596
verify sig: 262
boot net: boot file has no valid signature
Branching to 0x40000
ppcboot 0.6.4 (Apr 11 2002 - 16:10:44)
Initializing...
CPU: PPC823ZTnnA at 67 MHz: 2 kB I-Cache 1 kB D-Cache
*** Warning: CPU Core has Silicon Bugs -- Check the Errata ***
Board: ### No HW ID - assuming TQM8xxL
DRAM: (faked) 32 MB
debug: DDF: Calibrating delay loop... debug: DDF: 67.79 BogoMIPS
debug: WATCHDOG RESET
debug: BMon V1.0 mID 01
debug: feID dd gtxID 0b
debug: fpID 5a dsID 01-41.e5.ce.05.00.00-6e
debug: HWrev X5 SWrev 0.81
debug: B/Ex/Fl(MB) 16/00/08
WATCHDOG reset enabled
debug: &_text 0x10000, &_etext 0x26160, &_data 0x26160, &_edata 0x29c50
debug: &_end 0x347dc, &__stack 0x400000
debug: Memory tests (0x400000 -- 0x1000000)
debug: NumberTest: debug: passed
debug: MarchTest: debug: passed
debug: PermTest: debug: passed
dbox2:root> reset
dbox2:root>debug: DDF: Calibrating delay loop... debug: DDF: 67.79 BogoMIPS
debug: WATCHDOG RESET
debug: BMon V1.0 mID 01
debug: feID dd gtxID 0b
debug: fpID 5a dsID 01-41.e5.ce.05.00.00-6e
debug: HWrev X5 SWrev 0.81
debug: B/Ex/Fl(MB) 16/00/08
WATCHDOG reset enabled
debug: &_text 0x10000, &_etext 0x26160, &_data 0x26160, &_edata 0x29c50
debug: &_end 0x347dc, &__stack 0x400000
debug: Memory tests (0x400000 -- 0x1000000)
debug: NumberTest: debug: passed
debug: MarchTest: debug: passed
debug: PermTest: debug: passed
dbox2:root> erase
usage: erase start_sector [end_sector]
erase -1 erase all
erase -2 reset flash
dbox2:root> erase flash
eraseSector 0, sa 0x0, sa >> 2 0x0
erase: d7 not toggling: polling flag 0x0
reset flash
dbox2:root> reset
dbox2:root> debug: DDF: Calibrating delay loop... debug: DDF: 67.79 BogoMIPS
debug: WATCHDOG RESET
debug: BMon V1.0 mID 01
debug: feID dd gtxID 0b
debug: fpID 5a dsID 01-41.e5.ce.05.00.00-6e
debug: HWrev X5 SWrev 0.81
debug: B/Ex/Fl(MB) 16/00/08
WATCHDOG reset enabled
debug: &_text 0x10000, &_etext 0x26160, &_data 0x26160, &_edata 0x29c50
debug: &_end 0x347dc, &__stack 0x400000
debug: Memory tests (0x400000 -- 0x1000000)
debug: NumberTest: debug: passed
debug: MarchTest: debug: passed
debug: PermTest: debug: passed
dbox2:root> boot net
debug:
BOOTP/TFTP bootstrap loader (v0.3)
debug:
debug: Transmitting BOOTP request via broadcast
debug: Got BOOTP reply from Server IP 192.168.0.5, My IP 192.168.0.25
debug: Sending TFTP-request for file C/dbox2/setup_dboxboot/ppcboot_writeflash
will verify ELF image, start= 0x800000, size= 201596
verify sig: 262
boot net: boot file has no valid signature
Branching to 0x40000
ppcboot 0.6.4 (Apr 11 2002 - 16:10:44)
Initializing...
CPU: PPC823ZTnnA at 67 MHz: 2 kB I-Cache 1 kB D-Cache
*** Warning: CPU Core has Silicon Bugs -- Check the Errata ***
Board: ### No HW ID - assuming TQM8xxL
DRAM: (faked) 32 MB
debug: DDF: Calibrating delay loop... debug: DDF: 67.79 BogoMIPS
debug: WATCHDOG RESET
debug: BMon V1.0 mID 01
debug: feID dd gtxID 0b
debug: fpID 5a dsID 01-41.e5.ce.05.00.00-6e
debug: HWrev X5 SWrev 0.81
debug: B/Ex/Fl(MB) 16/00/08
WATCHDOG reset enabled
debug: &_text 0x10000, &_etext 0x26160, &_data 0x26160, &_edata 0x29c50
debug: &_end 0x347dc, &__stack 0x400000
debug: Memory tests (0x400000 -- 0x1000000)
debug: NumberTest: debug: passed
debug: MarchTest: debug: passed
debug: PermTest: debug: passed
dbox2:root>
wer kann mir helfen
-
- Einsteiger
- Beiträge: 110
- Registriert: Donnerstag 5. Dezember 2002, 14:33
debug: DDF: Calibrating delay loop... debug: DDF: 67.79 BogoMIPS
debug: BMon V1.0 mID 01
debug: feID dd gtxID 0b
debug: fpID 5a dsID 01-41.e5.ce.05.00.00-6e
debug: HWrev X5 SWrev 0.81
debug: B/Ex/Fl(MB) 16/00/08
WATCHDOG reset enabled
dbox2:root> debug:
BOOTP/TFTP bootstrap loader (v0.3)
debug:
debug: Transmitting BOOTP request via broadcast
debug: Got BOOTP reply from Server IP 192.168.0.6, My IP 192.168.0.24
debug: Sending TFTP-request for file C/Programme/DBoxBoot/ppcboot_writeflash
will verify ELF image, start= 0x800000, size= 201596
verify sig: 262
boot net: boot file has no valid signature
Branching to 0x40000
ppcboot 0.6.4 (Apr 11 2002 - 16:10:44)
Initializing...
CPU: PPC823ZTnnA at 67 MHz: 2 kB I-Cache 1 kB D-Cache
*** Warning: CPU Core has Silicon Bugs -- Check the Errata ***
Board: ### No HW ID - assuming TQM8xxL
DRAM: (faked) 32 MB
debug: DDF: Calibrating delay loop... debug: DDF: 67.79 BogoMIPS
debug: WATCHDOG RESET
debug: BMon V1.0 mID 01
debug: feID dd gtxID 0b
debug: fpID 5a dsID 01-41.e5.ce.05.00.00-6e
debug: HWrev X5 SWrev 0.81
debug: B/Ex/Fl(MB) 16/00/08
WATCHDOG reset enabled
dbox2:root> debug:
BOOTP/TFTP bootstrap loader (v0.3)
debug:
debug: Transmitting BOOTP request via broadcast
debug: Got BOOTP reply from Server IP 192.168.0.6, My IP 192.168.0.24
debug: Sending TFTP-request for file C/Programme/DBoxBoot/ppcboot_writeflash
will verify ELF image, start= 0x800000, size= 201596
verify sig: 262
boot net: boot file has no valid signature
Branching to 0x40000
ppcboot 0.6.4 (Apr 11 2002 - 16:10:44)
Initializing...
CPU: PPC823ZTnnA at 67 MHz: 2 kB I-Cache 1 kB D-Cache
*** Warning: CPU Core has Silicon Bugs -- Check the Errata ***
Board: ### No HW ID - assuming TQM8xxL
DRAM: (faked) 32 MB
debug: DDF: Calibrating delay loop... debug: DDF: 67.79 BogoMIPS
debug: WATCHDOG RESET
debug: BMon V1.0 mID 01
debug: feID dd gtxID 0b
debug: fpID 5a dsID 01-41.e5.ce.05.00.00-6e
debug: HWrev X5 SWrev 0.81
debug: B/Ex/Fl(MB) 16/00/08
WATCHDOG reset enabled
dbox2:root> debug:
BOOTP/TFTP bootstrap loader (v0.3)
debug:
debug: Transmitting BOOTP request via broadcast
debug: Got BOOTP reply from Server IP 192.168.0.6, My IP 192.168.0.24
debug: Sending TFTP-request for file C/Programme/DBoxBoot/ppcboot_writeflash
will verify ELF image, start= 0x800000, size= 201596
verify sig: 262
boot net: boot file has no valid signature
Branching to 0x40000
ppcboot 0.6.4 (Apr 11 2002 - 16:10:44)
Initializing...
CPU: PPC823ZTnnA at 67 MHz: 2 kB I-Cache 1 kB D-Cache
*** Warning: CPU Core has Silicon Bugs -- Check the Errata ***
Board: ### No HW ID - assuming TQM8xxL
DRAM: (faked) 32 MB
debug: DDF: Calibrating delay loop... debug: DDF: 67.79 BogoMIPS
debug: WATCHDOG RESET
debug: BMon V1.0 mID 01
debug: feID dd gtxID 0b
debug: fpID 5a dsID 01-41.e5.ce.05.00.00-6e
debug: HWrev X5 SWrev 0.81
debug: B/Ex/Fl(MB) 16/00/08
WATCHDOG reset enabled
dbox2:root> debug:
BOOTP/TFTP bootstrap loader (v0.3)
debug:
debug: Transmitting BOOTP request via broadcast
debug: Got BOOTP reply from Server IP 192.168.0.6, My IP 192.168.0.24
debug: Sending TFTP-request for file C/Programme/DBoxBoot/ppcboot_writeflash
will verify ELF image, start= 0x800000, size= 201596
verify sig: 262
boot net: boot file has no valid signature
Branching to 0x40000
ppcboot 0.6.4 (Apr 11 2002 - 16:10:44)
Initializing...
CPU: PPC823ZTnnA at 67 MHz: 2 kB I-Cache 1 kB D-Cache
*** Warning: CPU Core has Silicon Bugs -- Check the Errata ***
Board: ### No HW ID - assuming TQM8xxL
DRAM: (faked) 32 MB
debug: DDF: Calibrating delay loop... debug: DDF: 67.79 BogoMIPS
debug: WATCHDOG RESET
debug: BMon V1.0 mID 01
debug: feID dd gtxID 0b
debug: fpID 5a dsID 01-41.e5.ce.05.00.00-6e
debug: HWrev X5 SWrev 0.81
debug: B/Ex/Fl(MB) 16/00/08
WATCHDOG reset enabled
dbox2:root> debug:
BOOTP/TFTP bootstrap loader (v0.3)
debug:
debug: Transmitting BOOTP request via broadcast
debug: Got BOOTP reply from Server IP 192.168.0.6, My IP 192.168.0.24
debug: Sending TFTP-request for file C/Programme/DBoxBoot/ppcboot_writeflash
will verify ELF image, start= 0x800000, size= 201596
verify sig: 262
boot net: boot file has no valid signature
Branching to 0x40000
ppcboot 0.6.4 (Apr 11 2002 - 16:10:44)
Initializing...
CPU: PPC823ZTnnA at 67 MHz: 2 kB I-Cache 1 kB D-Cache
*** Warning: CPU Core has Silicon Bugs -- Check the Errata ***
Board: ### No HW ID - assuming TQM8xxL
DRAM: (faked) 32 MB
debug: DDF: Calibrating delay loop... debug: DDF: 67.79 BogoMIPS
debug: BMon V1.0 mID 01
debug: feID dd gtxID 0b
debug: fpID 5a dsID 01-41.e5.ce.05.00.00-6e
debug: HWrev X5 SWrev 0.81
debug: B/Ex/Fl(MB) 16/00/08
WATCHDOG reset enabled
dbox2:root> debug:
BOOTP/TFTP bootstrap loader (v0.3)
debug:
debug: Transmitting BOOTP request via broadcast
debug: Got BOOTP reply from Server IP 192.168.0.6, My IP 192.168.0.24
debug: Sending TFTP-request for file C/Programme/DBoxBoot/ppcboot_writeflash
will verify ELF image, start= 0x800000, size= 201596
verify sig: 262
boot net: boot file has no valid signature
Branching to 0x40000
ppcboot 0.6.4 (Apr 11 2002 - 16:10:44)
Initializing...
CPU: PPC823ZTnnA at 67 MHz: 2 kB I-Cache 1 kB D-Cache
*** Warning: CPU Core has Silicon Bugs -- Check the Errata ***
Board: ### No HW ID - assuming TQM8xxL
DRAM: (faked) 32 MB
debug: DDF: Calibrating delay loop... debug: DDF: 67.79 BogoMIPS
debug: WATCHDOG RESET
debug: BMon V1.0 mID 01
debug: feID dd gtxID 0b
debug: fpID 5a dsID 01-41.e5.ce.05.00.00-6e
debug: HWrev X5 SWrev 0.81
debug: B/Ex/Fl(MB) 16/00/08
WATCHDOG reset enabled
dbox2:root> debug:
BOOTP/TFTP bootstrap loader (v0.3)
debug:
debug: Transmitting BOOTP request via broadcast
debug: Got BOOTP reply from Server IP 192.168.0.6, My IP 192.168.0.24
debug: Sending TFTP-request for file C/Programme/DBoxBoot/ppcboot_writeflash
will verify ELF image, start= 0x800000, size= 201596
verify sig: 262
boot net: boot file has no valid signature
Branching to 0x40000
ppcboot 0.6.4 (Apr 11 2002 - 16:10:44)
Initializing...
CPU: PPC823ZTnnA at 67 MHz: 2 kB I-Cache 1 kB D-Cache
*** Warning: CPU Core has Silicon Bugs -- Check the Errata ***
Board: ### No HW ID - assuming TQM8xxL
DRAM: (faked) 32 MB
debug: DDF: Calibrating delay loop... debug: DDF: 67.79 BogoMIPS
debug: WATCHDOG RESET
debug: BMon V1.0 mID 01
debug: feID dd gtxID 0b
debug: fpID 5a dsID 01-41.e5.ce.05.00.00-6e
debug: HWrev X5 SWrev 0.81
debug: B/Ex/Fl(MB) 16/00/08
WATCHDOG reset enabled
dbox2:root> debug:
BOOTP/TFTP bootstrap loader (v0.3)
debug:
debug: Transmitting BOOTP request via broadcast
debug: Got BOOTP reply from Server IP 192.168.0.6, My IP 192.168.0.24
debug: Sending TFTP-request for file C/Programme/DBoxBoot/ppcboot_writeflash
will verify ELF image, start= 0x800000, size= 201596
verify sig: 262
boot net: boot file has no valid signature
Branching to 0x40000
ppcboot 0.6.4 (Apr 11 2002 - 16:10:44)
Initializing...
CPU: PPC823ZTnnA at 67 MHz: 2 kB I-Cache 1 kB D-Cache
*** Warning: CPU Core has Silicon Bugs -- Check the Errata ***
Board: ### No HW ID - assuming TQM8xxL
DRAM: (faked) 32 MB
debug: DDF: Calibrating delay loop... debug: DDF: 67.79 BogoMIPS
debug: WATCHDOG RESET
debug: BMon V1.0 mID 01
debug: feID dd gtxID 0b
debug: fpID 5a dsID 01-41.e5.ce.05.00.00-6e
debug: HWrev X5 SWrev 0.81
debug: B/Ex/Fl(MB) 16/00/08
WATCHDOG reset enabled
dbox2:root> debug:
BOOTP/TFTP bootstrap loader (v0.3)
debug:
debug: Transmitting BOOTP request via broadcast
debug: Got BOOTP reply from Server IP 192.168.0.6, My IP 192.168.0.24
debug: Sending TFTP-request for file C/Programme/DBoxBoot/ppcboot_writeflash
will verify ELF image, start= 0x800000, size= 201596
verify sig: 262
boot net: boot file has no valid signature
Branching to 0x40000
ppcboot 0.6.4 (Apr 11 2002 - 16:10:44)
Initializing...
CPU: PPC823ZTnnA at 67 MHz: 2 kB I-Cache 1 kB D-Cache
*** Warning: CPU Core has Silicon Bugs -- Check the Errata ***
Board: ### No HW ID - assuming TQM8xxL
DRAM: (faked) 32 MB
debug: DDF: Calibrating delay loop... debug: DDF: 67.79 BogoMIPS
debug: WATCHDOG RESET
debug: BMon V1.0 mID 01
debug: feID dd gtxID 0b
debug: fpID 5a dsID 01-41.e5.ce.05.00.00-6e
debug: HWrev X5 SWrev 0.81
debug: B/Ex/Fl(MB) 16/00/08
WATCHDOG reset enabled
dbox2:root> debug:
BOOTP/TFTP bootstrap loader (v0.3)
debug:
debug: Transmitting BOOTP request via broadcast
debug: Got BOOTP reply from Server IP 192.168.0.6, My IP 192.168.0.24
debug: Sending TFTP-request for file C/Programme/DBoxBoot/ppcboot_writeflash
will verify ELF image, start= 0x800000, size= 201596
verify sig: 262
boot net: boot file has no valid signature
Branching to 0x40000
ppcboot 0.6.4 (Apr 11 2002 - 16:10:44)
Initializing...
CPU: PPC823ZTnnA at 67 MHz: 2 kB I-Cache 1 kB D-Cache
*** Warning: CPU Core has Silicon Bugs -- Check the Errata ***
Board: ### No HW ID - assuming TQM8xxL
DRAM: (faked) 32 MB
debug: DDF: Calibrating delay loop... debug: DDF: 67.79 BogoMIPS
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- Tuxboxer
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*MEGAROTFL*xkill hat geschrieben: debug: NumberTest: debug: passed
debug: MarchTest: debug: passed
debug: PermTest: debug: passed
dbox2:root> help
read the source or dial 7478

Die Box hat nur 16 anstatt 32MB RAM. Nachschauen ob die 16MB Erweiterung locker ist/fehlt. Falls fehlt: Verkäufer auf die Finger haun.xkill hat geschrieben:debug: B/Ex/Fl(MB) 16/00/08
Es gibt auch eine alternative "nur-16MB-Flashmethode".
Weitere Infos spricht die Suchfunktion.
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reset
/ > debug: DDF: Calibrating delay loop... debug: DDF: 67.79 BogoMIPS
debug: BMon V1.0 mID 01
debug: feID dd gtxID 0b
debug: fpID 5a dsID 01-41.e5.ce.05.00.00-6e
debug: HWrev X5 SWrev 0.81
debug: B/Ex/Fl(MB) 16/00/08
WATCHDOG reset enabled
debug: &_text 0x10000, &_etext 0x26160, &_data 0x26160, &_edata 0x29c50
debug: &_end 0x347dc, &__stack 0x400000
debug: Memory tests (0x400000 -- 0x1000000)
debug: NumberTest: debug: passed
debug: MarchTest: debug: passed
debug: PermTest: debug: passed
dbox2:root> boot serial
boot: unknown device: serial
boot: elfcopy failed: 16
dbox2:root> boot net
debug:
BOOTP/TFTP bootstrap loader (v0.3)
debug:
debug: Transmitting BOOTP request via broadcast
debug: Got BOOTP reply from Server IP 192.168.0.6, My IP 192.168.0.20
debug: Sending TFTP-request for file C/Programme/DBoxBoot/ppcboot_writeflash
will verify ELF image, start= 0x800000, size= 201596
verify sig: 262
boot net: boot file has no valid signature
Branching to 0x40000
ppcboot 0.6.4 (Apr 11 2002 - 16:10:44)
Initializing...
CPU: PPC823ZTnnA at 67 MHz: 2 kB I-Cache 1 kB D-Cache
*** Warning: CPU Core has Silicon Bugs -- Check the Errata ***
Board: ### No HW ID - assuming TQM8xxL
DRAM: (faked) 32 MB
debug: DDF: Calibrating delay loop... debug: DDF: 67.79 BogoMIPS
debug: WATCHDOG RESET
debug: BMon V1.0 mID 01
debug: feID dd gtxID 0b
debug: fpID 5a dsID 01-41.e5.ce.05.00.00-6e
debug: HWrev X5 SWrev 0.81
debug: B/Ex/Fl(MB) 16/00/08
WATCHDOG reset enabled
dbox2:root> debug:
BOOTP/TFTP bootstrap loader (v0.3)
debug:
debug: Transmitting BOOTP request via broadcast
debug: Got BOOTP reply from Server IP 192.168.0.6, My IP 192.168.0.20
debug: Sending TFTP-request for file C/Programme/DBoxBoot/ppcboot_writeflash
will verify ELF image, start= 0x800000, size= 201596
verify sig: 262
boot net: boot file has no valid signature
Branching to 0x40000
ppcboot 0.6.4 (Apr 11 2002 - 16:10:44)
Initializing...
CPU: PPC823ZTnnA at 67 MHz: 2 kB I-Cache 1 kB D-Cache
*** Warning: CPU Core has Silicon Bugs -- Check the Errata ***
Board: ### No HW ID - assuming TQM8xxL
DRAM: (faked) 32 MB
debug: DDF: Calibrating delay loop... debug: DDF: 67.79 BogoMIPS
debug: WATCHDOG RESET
debug: BMon V1.0 mID 01
debug: feID dd gtxID 0b
debug: fpID 5a dsID 01-41.e5.ce.05.00.00-6e
debug: HWrev X5 SWrev 0.81
debug: B/Ex/Fl(MB) 16/00/08
WATCHDOG reset enabled
debug: autoboot aborted from terminal
dbox2:root>
wenn ich boot net mache resettet sie nur wegen 16MB Wer kennt sich damit aus oder kann mir helfen ich kann sie nicht flashen
/ > debug: DDF: Calibrating delay loop... debug: DDF: 67.79 BogoMIPS
debug: BMon V1.0 mID 01
debug: feID dd gtxID 0b
debug: fpID 5a dsID 01-41.e5.ce.05.00.00-6e
debug: HWrev X5 SWrev 0.81
debug: B/Ex/Fl(MB) 16/00/08
WATCHDOG reset enabled
debug: &_text 0x10000, &_etext 0x26160, &_data 0x26160, &_edata 0x29c50
debug: &_end 0x347dc, &__stack 0x400000
debug: Memory tests (0x400000 -- 0x1000000)
debug: NumberTest: debug: passed
debug: MarchTest: debug: passed
debug: PermTest: debug: passed
dbox2:root> boot serial
boot: unknown device: serial
boot: elfcopy failed: 16
dbox2:root> boot net
debug:
BOOTP/TFTP bootstrap loader (v0.3)
debug:
debug: Transmitting BOOTP request via broadcast
debug: Got BOOTP reply from Server IP 192.168.0.6, My IP 192.168.0.20
debug: Sending TFTP-request for file C/Programme/DBoxBoot/ppcboot_writeflash
will verify ELF image, start= 0x800000, size= 201596
verify sig: 262
boot net: boot file has no valid signature
Branching to 0x40000
ppcboot 0.6.4 (Apr 11 2002 - 16:10:44)
Initializing...
CPU: PPC823ZTnnA at 67 MHz: 2 kB I-Cache 1 kB D-Cache
*** Warning: CPU Core has Silicon Bugs -- Check the Errata ***
Board: ### No HW ID - assuming TQM8xxL
DRAM: (faked) 32 MB
debug: DDF: Calibrating delay loop... debug: DDF: 67.79 BogoMIPS
debug: WATCHDOG RESET
debug: BMon V1.0 mID 01
debug: feID dd gtxID 0b
debug: fpID 5a dsID 01-41.e5.ce.05.00.00-6e
debug: HWrev X5 SWrev 0.81
debug: B/Ex/Fl(MB) 16/00/08
WATCHDOG reset enabled
dbox2:root> debug:
BOOTP/TFTP bootstrap loader (v0.3)
debug:
debug: Transmitting BOOTP request via broadcast
debug: Got BOOTP reply from Server IP 192.168.0.6, My IP 192.168.0.20
debug: Sending TFTP-request for file C/Programme/DBoxBoot/ppcboot_writeflash
will verify ELF image, start= 0x800000, size= 201596
verify sig: 262
boot net: boot file has no valid signature
Branching to 0x40000
ppcboot 0.6.4 (Apr 11 2002 - 16:10:44)
Initializing...
CPU: PPC823ZTnnA at 67 MHz: 2 kB I-Cache 1 kB D-Cache
*** Warning: CPU Core has Silicon Bugs -- Check the Errata ***
Board: ### No HW ID - assuming TQM8xxL
DRAM: (faked) 32 MB
debug: DDF: Calibrating delay loop... debug: DDF: 67.79 BogoMIPS
debug: WATCHDOG RESET
debug: BMon V1.0 mID 01
debug: feID dd gtxID 0b
debug: fpID 5a dsID 01-41.e5.ce.05.00.00-6e
debug: HWrev X5 SWrev 0.81
debug: B/Ex/Fl(MB) 16/00/08
WATCHDOG reset enabled
debug: autoboot aborted from terminal
dbox2:root>
wenn ich boot net mache resettet sie nur wegen 16MB Wer kennt sich damit aus oder kann mir helfen ich kann sie nicht flashen
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- Oberlamer, Administrator & Supernanny
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http://tuxbox.berlios.de/forum/viewtopi ... highlight= ganz unten den Beitrag von SoLaLa lesen.
There are 10 types of people in the world: those who know binary and those who don't
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- Einsteiger
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debug: DDF: Calibrating delay loop... debug: DDF: 67.79 BogoMIPS
debug: BMon V1.0 mID 01
debug: feID dd gtxID 0b
debug: fpID 5a dsID 01-41.e5.ce.05.00.00-6e
debug: HWrev X5 SWrev 0.81
debug: B/Ex/Fl(MB) 16/00/08
WATCHDOG reset enabled
dbox2:root> debug:
BOOTP/TFTP bootstrap loader (v0.3)
debug:
debug: Transmitting BOOTP request via broadcast
debug: Got BOOTP reply from Server IP 192.168.0.5, My IP 192.168.0.7
debug: Sending TFTP-request for file C/dbox2/ppcboot_1.1.6/ppcboot_1.1.6
will verify ELF image, start= 0x800000, size= 201716
verify sig: 262
boot net: boot file has no valid signature
Branching to 0x40000
PPCBoot 1.1.6 (TuxBox) (May 30 2002 - 15:38:28)
CPU: PPC823ZTnnA at 67.200 MHz: 2 kB I-Cache 1 kB D-Cache
*** Warning: CPU Core has Silicon Bugs -- Check the Errata ***
Watchdog enabled
Board: DBOX2, Nokia
I2C: ready
DRAM: 16 MB
FLASH: 8 MB
Scanning JFFS2 FS:
.
find_inode failed for name=env
load: Failed to find inode
LCD: Scanning JFFS2 FS:
.
find_inode failed for name=logo-lcd
load: Failed to find inode
ready - can't find logo in flash - try network
BOOTP broadcast 1
ARP broadcast 1
TFTP from server 192.168.0.5; our IP address is 192.168.0.7
Filename 'logo-lcd'.
Load address: 0x100000
Loading: *
Abort
can't find logo
FB: Scanning JFFS2 FS:
.
find_inode failed for name=logo-fb
load: Failed to find inode
can't find logo in flash - try network
ARP broadcast 1
TFTP from server 192.168.0.5; our IP address is 192.168.0.7
Filename 'logo-fb'.
Load address: 0x100000
Loading: *
Abort
can't find logo - no init
In: serial
Out: serial
Err: serial
Hit any key to stop autoboot: 0
=> bootp 00100000 /c/dbox2/XMAS_2XI
=> tftp
ARP broadcast 1
TFTP from server 192.168.0.5; our IP address is 192.168.0.7
Filename '/c/dbox2/XMAS_2XI'.
Load address: 0x100000
Loading: T T T T T T
Abort
=> protect off 10020000 107fffff
...............................................................
Un-Protected 63 sectors
=> erase 10020000 107fffff
Erase Flash from 0x10020000 to 0x107fffff
...............................................................
Erased 63 sectors
=> cp 00100000 10020000 1f8000
Copy to Flash...
=>
so wenn ich sie neu starte kommt nur kein system gibt es bestimmte image dafür oder wie???
debug: BMon V1.0 mID 01
debug: feID dd gtxID 0b
debug: fpID 5a dsID 01-41.e5.ce.05.00.00-6e
debug: HWrev X5 SWrev 0.81
debug: B/Ex/Fl(MB) 16/00/08
WATCHDOG reset enabled
dbox2:root> debug:
BOOTP/TFTP bootstrap loader (v0.3)
debug:
debug: Transmitting BOOTP request via broadcast
debug: Got BOOTP reply from Server IP 192.168.0.5, My IP 192.168.0.7
debug: Sending TFTP-request for file C/dbox2/ppcboot_1.1.6/ppcboot_1.1.6
will verify ELF image, start= 0x800000, size= 201716
verify sig: 262
boot net: boot file has no valid signature
Branching to 0x40000
PPCBoot 1.1.6 (TuxBox) (May 30 2002 - 15:38:28)
CPU: PPC823ZTnnA at 67.200 MHz: 2 kB I-Cache 1 kB D-Cache
*** Warning: CPU Core has Silicon Bugs -- Check the Errata ***
Watchdog enabled
Board: DBOX2, Nokia
I2C: ready
DRAM: 16 MB
FLASH: 8 MB
Scanning JFFS2 FS:

find_inode failed for name=env
load: Failed to find inode
LCD: Scanning JFFS2 FS:

find_inode failed for name=logo-lcd
load: Failed to find inode
ready - can't find logo in flash - try network
BOOTP broadcast 1
ARP broadcast 1
TFTP from server 192.168.0.5; our IP address is 192.168.0.7
Filename 'logo-lcd'.
Load address: 0x100000
Loading: *
Abort
can't find logo
FB: Scanning JFFS2 FS:

find_inode failed for name=logo-fb
load: Failed to find inode
can't find logo in flash - try network
ARP broadcast 1
TFTP from server 192.168.0.5; our IP address is 192.168.0.7
Filename 'logo-fb'.
Load address: 0x100000
Loading: *
Abort
can't find logo - no init
In: serial
Out: serial
Err: serial
Hit any key to stop autoboot: 0
=> bootp 00100000 /c/dbox2/XMAS_2XI
=> tftp
ARP broadcast 1
TFTP from server 192.168.0.5; our IP address is 192.168.0.7
Filename '/c/dbox2/XMAS_2XI'.
Load address: 0x100000
Loading: T T T T T T
Abort
=> protect off 10020000 107fffff
...............................................................
Un-Protected 63 sectors
=> erase 10020000 107fffff
Erase Flash from 0x10020000 to 0x107fffff
...............................................................

Erased 63 sectors
=> cp 00100000 10020000 1f8000
Copy to Flash...

=>
so wenn ich sie neu starte kommt nur kein system gibt es bestimmte image dafür oder wie???
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Aber bitte doch: http://zebra.fh-weingarten.de/~kliche/dbox2/alexw/
There are 10 types of people in the world: those who know binary and those who don't
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